High-Linearity High-Efficiency CMOS Integrated Power Amplifiers for 4G Communications

Wireless infrastructure has been rapidly taking over as the cornerstone of modern communication means in the past two decades. One can now recognize the importance of GPS systems, WLAN and most importantly cellular systems (GSM, CDMA, W-CDMA, etc.) and how they have been entrenched in everyday life. Moreover, due to the technical advance in IC fabrication, it has been possible to integrate more and more functionalities into a single chip.

This is giving rise to smaller multi-purpose wireless devices which are cheaper due to mass production. However, a bottleneck to finally combining all the RF-transceiver’s front-end circuits lies in the power amplifier (PA). The PA is a circuit which precedes the antenna in the transmitter chain and has to deliver power levels of 1 to 2 Watt with high efficiency for cellular systems. The main focus of this research is to implement a highly-efficient PA with high-linearity in order to transmit modern modulated signals such as QPSK and QAM e.g. for the LTE standard.

This work is funded by the „European Fonds for Regional Development“ (EFRE) and is conducted in the framework of the Embedded Systems Institute (http://www.esi.uni-erlangen.de/) of the University of Erlangen-Nuremberg.